Embedded FPGAs: Delivering on SoC Designers' Quest for Hardware Crypto-Agility?

A number of silicon Intellectual Property (IP) and hardware vendors have been partnering up to combine Post-Quantum Cryptography (PQC) capabilities with embedded Field Programmable Gate Array (eFPGA) products. Hardware IP provider Xiphera has been particularly active in the space, working with both Flex Logix (eFPGA IP) and QuickLogic (eFPGA IP and hardware) to showcase the capabilities of its xQlave PQC cores for the form factor. Menta, another eFPGA IP provider, has been working with PQSecure (a PQC IP vendor) to bring ML-KEM and ML-DSA algorithms into Menta’s eFPGA platforms. The industry more broadly has been touting the merits of eFPGA to overcome System-on-Chip (SoC) hardware limitations set by PQC integration.

The issue with PQC is that it remains an untested and emergent technology area, still undergoing standardization and potentially subject to future, unknown vulnerabilities that will only be exposed once these algorithms are in the wild. And yet, PQC readiness is something that SoC designers have to build in now. The problem is then how to address both current and future issues in current designs. Clients’ expectation is that a state-of-the-art SoC should last 10 years, with the understanding that the currently standardized algorithms (Federal Information Processing Standards (FIPS) 203, 204, and 205) should already be included in those designs, and that the incoming FIPS 206 and 207 should also be accounted for. This is driving demand for software programming of the hardware (and, therefore, crypto-agility in SoC design), enabling customers to have the chipset now with existing standards, but also be able to obtain future support for upcoming standards.

This type of software-defined hardware is essentially best served by eFPGAs. The appeal is that they can be updated in-field with new schemes or even side-channel fixes if needed, and this is especially valuable for those products with long lifetimes. While PQC can certainly be served this way in software, to achieve real tamper resistance requires hardware, and eFPGAs can offer such a guarantee.

Beyond that, eFPGAs can provide good parallelism for heavy math, suitable for a lot of the lattice-based PQC schemes. This will be important because of the significant overhead of the new algorithms, and eFPGAs can provide potentially higher throughput and energy efficiency than Central Processing Units (CPUs), for example. eFPGAs are also a good fit for hybrid implementations. The classical algorithms can be hardened as fixed-function accelerators, with the new PQC schemes placed in the reconfigurable fabric. Of course, the trade-off is that they may be less performant and slower than if all the schemes (including PQC) were just baked into the gates, but that is what will enable crypto-agility.

eFPGA usage makes a lot of sense in SoC designs for products where protocol and security requirements evolve over many years and where respinning is not really an option. Some of the targeted applications for crypto-agile eFPGAs include 5G base stations and Open Radio Access Network (RAN) Remote Unit (RU)/Distributed Unit (DU), Smart Network Interface Cards (SmartNICs) and data center switches and routers, automotive zonal and Advanced Driver-Assistance Systems (ADAS) controllers, secure industrial and Internet of Things (IoT) gateways and Programmable Logic Controllers (PLCs), defense radios, mission computers, avionics, and and security appliances like Hardware Security Modules (HSMs). For eFPGA vendors targeting the PQC transition and the increasing demands for crypto-agility, it will be important to anchor messaging in vertical use cases, as there will be different configuration requirements. For mainstream, high-density IP, it may be good to showcase visible PQC IP partners where there are documented use cases. For defense and industrial targets, radiation tolerant (rad-hard) options are important features. Beyond that, it’s about positioning crypto-agility as-a-Service, with the ability to support hybrid and staged migration. Framing themselves as the hardware basis for PQC-ready, upgradeable trust anchors across long-lived SoCs with end-market specialization capabilities can go a long way in promoting eFPGA vendors as champions in the PQC transition era.