Interconnect Innovation: NVLink, UALink, and the Race to Scale AI

The Artificial Intelligence (AI) supercycle is accelerating at an unprecedented pace, and NVIDIA is dominating: its supremacy started with Hopper; today’s Blackwell is back ordered for months and the upcoming Rubin will redefine AI processing. But having the best Graphics Processing Units (GPUs) is not enough when the largest AI training clusters need to scale thousands of GPUs and connect them with almost-zero-latency. For example, one of the largest AI supercomputers is the Colossus, deployed by xAI with 200,000 GPUs and a plan to increase these to 1 million. Coordinating workloads between these GPUs is as important as the GPUs themselves, otherwise foundational models will not be trainable.

A critical component to NVIDIA’s success has been supporting technologies, with NVLink and NVSwitch being prime examples. NVLink is referred to as scale-up networking, connecting GPUs with memory coherency and near-zero-latency, whereas NVSwitch is generally scale-out, connecting multiple of these GPU clusters within a data center. (Note: NVSwitch chips are also utilized in scale-up infrastructure to connect GPUs within a server, e.g. every NVIDIA HGX H200 system with 8 GPUs featuring 4 NVSwitch chips.) There is another, more recent, addition called scale-across, which aims to connect GPUs located in different data centers. In these three connectivity domains, range and performance are inversely proportional to each other: scale-up has the lowest range (a few meters) but the highest throughput and lowest latency, whereas the range of scale-across excels at the expense of performance and latency.

NVIDIA’s success has been partly driven by its strategic acquisition of Mellanox, which made InfiniBand and NVSwitch the standard for scale-out, whereas NVLink was developed by NVIDIA internally. It is also notable that many companies are now successful for their expertise in a part of the NVIDIA stack; CoreWeave is successful partly due to its purpose-built InfiniBand network and Oracle due to its RDMA over Converged Ethernet (RoCE) implementation. The discussion in this ABI Insight is dominated, so far, by NVIDIA, mirroring the market itself but the AI industry is actively looking for alternatives and has, thus, created UALink to offer an open and standardized scale-up and scale-out alternative.

The UALink consortium was founded in May 2024, released its first specification in May 2025, and commercial products based on this first specification are expected at the end of 2026. Its founding members are direct NVIDIA competitors: AMD, Cisco, HPE, and Intel, among others. In the same month, UALink published its first specification, NVIDIA announced NVLink Fusion, supposedly opening up NVLink to willing partners but will only license the Intellectual Property (IP) of NVLink C2C, the slower version. The fastest version, NVLink 5, will not be licensed, but offered as a part of its Fusion Chiplet, which will only be allowed in solutions that include an NVIDIA GPU coupled with a third-party Arm-based Central Processing Unit (CPU) or solutions that include an NVIDIA CPU (e.g., Grace) with a third-party accelerator. So NVIDIA is not opening its technologies to third parties but trying to position itself in the center of the scale-up universe.

NVLink and UALink are high-speed interconnect protocols that depend on physical implementations to move massive amounts of data over short distances. This is enabled by the Serializer/Deserializer (SerDes) component, which converts parallel GPU data streams into serialized signals for efficient transmission over a single cable. NVIDIA’s SerDes is considered among the best in the industry, rivaled only by Broadcom, while others—such as Marvell and Qualcomm (following its Alphawave acquisition)—are still catching up. This leadership gap explains why HPE’s recent AI infrastructure partnership with AMD adopted UALink over Ethernet (UALoE) instead of UALink scale-up networking: there is currently no viable third-party SerDes alternative for scale-up, even for AMD and HPE, both founding members of UALink. As a result, they opted for Broadcom’s SerDes combined with UALoE.

Nevertheless, the membership of UALink has kept growing with 100 member companies as of the end of 2025, meaning the consortium is credible and popular.

The competition to create faster and better GPU connections will intensify and diversify as throughputs increase and reach the limit of copper. The market is already experiencing signs of these: the Credo OmniConnect is a new form of interconnect architecture that stretches the limits of copper in short ranges whereas Marvell acquired Celestial AI partly for its photonic fabric technology, which uses optical fiber rather than copper. In the next few years, SerDes and the physical layer—both copper and fiber—will be a fiercely competitive environment where second best is not even an option.s

But those may all be moot points because UALink will not come to market in time. UALink v2 does not have a release date yet; assuming it comes out mid-2026, then we should expect products to be generally available 12 to 18 months after, at best. This means commercial availability of UALink v2 products by 2028 the earliest, when NVLink will already be in its 7th or 8th version. Moreover, AMD—NVIDIA’s closest GPU competitor—has chosen Broadcom’s UALoE and Intel is now partnering with NVIDIA and aiming to use NVIDIA’s GPU chiplets as part of its future x86-based processors. That leaves UALink in a precarious position, with its founding members now choosing alternative technologies and NVLink Fusion tempting the market. The future of UALink is uncertain and there are no indications that any company will make any promises that will secure the commercial future of this fledgling new consortium. Surely there is a gap in the market and a strong need for NVIDIA competition, but UALink will likely be too late.