ARM Announces New Automotive Solutions, Highlights Importance of Efficiency

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4Q 2018 | IN-5270

This month, Arm announced that it be launching a new autonomous-class processor, the Cortex A76AE, along with software tools. The new processor focuses on being power efficient while also being safety capable to industry standards ISO 26262 Automotive Safety Integrity Level (ASIL) D. The announcement of a new processor that maximizes performance-per-watt and adheres to safety standards is part of an industry-wide shift placing an emphasis on autonomous system efficiency as products start to move from trial phase to commercialization.

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Arm Announces New Cortex-A76AE Processor

NEWS


This month, Arm announced that it be launching a new autonomous-class processor, the Cortex A76AE, along with software tools. The new processor focuses on being power efficient while also being safety capable to industry standards ISO 26262 Automotive Safety Integrity Level (ASIL) D.

The announcement of a new processor that maximizes performance-per-watt and adheres to safety standards is part of an industry-wide shift placing an emphasis on autonomous system efficiency as products start to move from trial phase to commercialization.

Importance of System Efficiency Highlighted 

IMPACT


As part of the announcement, Arm highlighted how the new Cortex-A76AE CPU could be used in conjunction with other Arm products, such as the Mali-G76 Graphics Processing Unit (GPU) and Arm Machine Learning (ML) processor, and with CoreLink as part of a high-performance scalable computing platform. However, at the core of the new processor and platform announcement was maximizing performance-per-watt, with a typical 16 core Cortex-A76AE configuration with CMN-600AE at 7 nanometer having a power rating of less than 15 watts.

The new processor—the Cortex-A76AE Central Processing Unit (CPU)—will feature a new split-lock design which allows for ASIL D design while minimizing computing requirements. Conventional approaches for ASIL D design are redundant execution and lock-step design. In lockstep, two CPU cores execute the exact same code, and the output is fed into comparator logic block. In redundant execution two independent codes are executed and the outputs of the applications are compared by an additional, higher safety core for correctness. This core will ultimately be responsible for the control and actuate phase. This approach has a high level of system complexity, but due to the benefit of software flexibility, it is widely deployed in high compute automotive applications. With Split -Lock, Arm has attempted to reach an intermediary solution between lockstep and redundant execution. In “split mode,” two independent CPUs can be used for a diverse range of tasks and applications, while in “lock mode” the CPUs are lock stepped for high safety integrity applications.

In autonomous vehicles applications, Split-Lock allows for potential fail-operational modes, enabling the system to operate in a degraded mode rather than completely shutting the system down. For example, in lock mode, if one core starts to exhibit failure, the system can be quiesced; the locked core can then be split, and the faulty core taken offline, allowing for continuation in a degraded mode of operation. This approach to redundancy from Arm will reduce software complexity and latency as well as critically reduce power requirements.

Minimizing power usage is becoming of increasing importance to Original Equipment Manufacturers (OEMs), technology companies, and those involved in autonomous vehicle trials. In many ways it is becoming a distinguishing factor among different hardware solutions. This is a relatively new trend, as autonomous vehicles move from trial phases toward product commercialization. Current semiconductor vendors will therefore need to stay atop of this trend, as this could also open opportunities for other semiconductor companies. 

Making the Jump to Higher-Level Vehicle Autonomy

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Companies such as Arm and Nvidia, although prominent in autonomous applications, have a history of more traditional areas of the vehicle, such as infotainment. Nvidia, for example, partnered with Audi to provide a high-level infotainment experience, while the Arm architectures are the most widely used architectures in automotive infotainment applications. Other semiconductor companies that are involved in the infotainment space could use similar approaches—leveraging their existing relationships and partnerships to pitch their services for autonomous system development.

The most important requirement for any autonomous application will be to adhere to strict safety requirements. Enabling solutions that are safety capable to industry standards ISO26262 ASIL D should be the priority for any company looking to enter the space. Having achieved ASIL D, it would seem that the next priority should now be to maximize power efficiency.

Currently, the industry is split on how much computation power is actually required for higher-level autonomous applications; this will depend on the individual approach taken by the autonomous system developer. Companies such as Nvidia and Tesla clearly see autonomous systems requiring high amounts of power which they then can provide through their hardware. Meanwhile, companies such as Mobileye and Arm see the high-power approaches as not being sustainable for mass production and unnecessary, and therefore they favor a more “lightweight philosophy” that sacrifices some power for efficiency.

Autonomous software companies such as AIMotive have already moved to make their solutions more power efficient. Having originally partnered with Nvidia by using the Nvidia Drive platform, the company has now developed its own Intellectual Property (IP)—aiWare. aiWare is a dedicated neural network accelerator IP that is optimized for delivering high performance at low power. Other companies, such as Mobileye (who has a dominant position in the current Advanced Driver Assistance Systems [ADAS] computing space), have long promoted combined software and hardware approaches to ensure hardware-optimized software to reduce power requirements. Seeing as Arm has also marketed Cortex as having low thermal energy wastage and therefore lower power requirements, power efficiency seems to be a message that resonates with OEMs and is a growing trend in the industry. Companies such as Nvidia may have to be more conscious around the clearly growing concern around energy consumption and performance per watt. So how can efficiency be achieved?

Current approaches revolve around redesigning hardware IP and/or software optimization. However, these approaches will involve either integration of software with hardware or hardware providers working closely with autonomous software developers—be they dedicated autonomy software companies, tier ones, or OEMs. The early approach of building “off-the-shelf” hardware solutions is clearly not good enough now, as autonomy implementers move from trials toward actual commercialization. Current companies in the space will therefore have to be more wary of ensuring efficiency, either by pushing more of their software solutions or by developing deeper partnerships with the software companies that use their hardware. Meanwhile, semiconductor companies that provide applications in other areas, such as infotainment, could use their partnerships with tier ones and OEMs to closely develop hardware that is optimized for autonomous vehicle applications.

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